The present disclosure relates to a semiconductor structure, and particularly to a field effect transistor including a wraparound gate formed by dual replacement of disposable layers and a method of manufacturing the same.
The degree of control of electronic transport in the channel region of a field effect transistor is a predominant factor determining the level of leakage currents. A wraparound gate is a configuration that enhances control of the electronic transport in the channel region of a field effect transistor. However, formation of a wraparound gate typically requires multiple additional processing steps, thereby increasing the processing time and cost during manufacturing. Further, integration schemes that employ a semiconductor-on-insulator (SOI) substrate increase the cost of production because SOI substrates are more expensive than bulk substrates. Thus, a simple process integration scheme for reliably forming a wraparound gate structure employing a bulk semiconductor substrate is desired.